POLYN Technology introduced VibroSense, a Tiny AI chip solution for vibration monitoring sensor nodes. VibroSense greatly reduces the amount of sensor data transmitted to the cloud, saving on power consumption and enabling energy-harvesting designs.
POLYN is a fabless semiconductor company providing application specific Neuromorphic Analog Signal Processing (NASP) technology and Neuromorphic Front End (NFE) chips for always-on sensor-level solutions. NFE enables ultra-low power consumption, low latency, and high resiliency for novel AI products at the thin edge.
VibroSense extracts unique patterns from a sensor’s raw signal and passes the valuable data only for classification at the next compute point. It smoothly and simply integrates into existing solutions to improve the ROI and OPEX of the deployment. It is particularly suited to Industry 4.0 applications.
POLYN provides a framework for trained neural networks conversion into an analog neuromorphic chip for inference. It supports a hybrid architecture where unique patterns of the specific signal are extracted in the analog portion, leaving classification for the digital element. In this way VibroSense supports flexibility along with power consumption savings and specific machine adaptation to allow various deployments within the same chip.
POLYN is a fabless semiconductor company providing application specific Neuromorphic Analog Signal Processing (NASP) technology and Neuromorphic Front End (NFE) chips for always-on sensor-level solutions. NFE enables ultra-low power consumption, low latency, and high resiliency for novel AI products at the thin edge.
VibroSense extracts unique patterns from a sensor’s raw signal and passes the valuable data only for classification at the next compute point. It smoothly and simply integrates into existing solutions to improve the ROI and OPEX of the deployment. It is particularly suited to Industry 4.0 applications.
POLYN provides a framework for trained neural networks conversion into an analog neuromorphic chip for inference. It supports a hybrid architecture where unique patterns of the specific signal are extracted in the analog portion, leaving classification for the digital element. In this way VibroSense supports flexibility along with power consumption savings and specific machine adaptation to allow various deployments within the same chip.